“Cascode amplifier with a common source amplifier”;
The cascode improves input-output isolation (or reverse transmission) as there is no direct coupling from the output to input.This eliminates the Miller effect and thus contributes to a much higher bandwidth.
Operation:
Cascode amplifier with a common source amplifier
Figure shows an example of cascode amplifier with a common source amplifier as input stage driven by signal source Vin.This input stage drives a common gate amplifier as output stage with output signal Vout.
As the lower FET is conducting by providing gate voltage, the upper FET conducts due to the potential difference now appearing between its gate and source.
The major advantage of this circuit arrangement stems from the placement of the upper field-effect transistor(FET) as the load of the input (lower) FET's output terminal (drain).
Because at operating frequencies the upper FET's gate is effectively grounded, the upper FET's source voltage (and therefore the input transistor's drain) is held at nearly constant voltage during operation.
In other words, the upper FET exhibits a low input resistance to the lower FET, making the voltage gain of the lower FET very small, which dramatically reduces the Miller feedback capacitance from the lower FET's drain to gate.This loss of voltage gain is recovered by the upper FET.
Thus, the upper transistor permits the lower FET to operate with minimum negative (Miller) feedback, improving its bandwidth.
The upper FET gate is electrically grounded, so charge and discharge of stray capacitance Cdg between drain and gate is simply through RD and the output load (say Rout) and the frequency response is affected only for frequencies above the associated RC time constant: τ = CdgRD//Rout,namely f = 1/(2πτ), a rather high frequency because Cdg is small. That is, the upper FET gate does not suffer from Miller amplification of Cdg.
If the upper FET stage were operated alone using its source as input node (i.e. common gate (CG) configuration), it would have good voltage gain and wide bandwidth. However, its low input impedance would limit its usefulness to very low impedance voltage drivers.
Adding the lower FET results in a high input impedance allowing the cascode stage to be driven by a high impedance source.
If one were to replace the upper FET with a typical inductive/resistive load and take the output from the input transistor's drain (i.e. a common source(CS) configuration), the CS configuration would offer the same input impedance as the cascode but the cascode configuration would offer a potentially greater gain and much greater bandwidth.
3.3 Common source amplifier – Voltage swing limitations
In electronics, a common-source amplifier is one of three basic single-stage field-effect transistor(FET) amplifier topologies, typically used as a voltage or trans conductance amplifier.
The easiest way to tell if a FET is common source, common drain or common gate is to examine where the signal enters and leaves.
The remaining terminal is what is known as "common". In this example, the signal enters the gate and exits the drain.
The only terminal remaining is the source. This is a common-source FET circuit. The analogous bipolar junction transistor circuit is the common-emitter amplifier.
The common-source (CS) amplifier may be viewed as a transconductance amplifier or as a voltage amplifier.
As a transconductance amplifier, the input voltage is seen as modulating the current going to the load.
As a voltage amplifier, input voltage modulates the amount of current flowing through the FET changing the voltage across the output resistance according to Ohm's law.
However, the FET device's output resistance typically is not high enough for a reasonable transconductance amplifier (ideally infinite) nor low enough for a decent voltage amplifier (ideally zero).
Another major drawback is the amplifier's limited high-frequency response. Therefore, in practice the output often is routed through either a voltage follower ( common-drain or CD stage) or a current follower (common-gate or CG stage), to obtain more favorable output and frequency characteristics.
The CS–CG combination is called a cascode amplifier.
Small signal analysis:
Basic N-channel JFET common-source circuit with source degeneration.
Two port parameters:
Two port parameters
Two port CS model:
Reattach source and load one ports:
Two port CS model
Maximize Gain of CS Amplifier:
• Increase the gm (more current)
• Increase RD
• Limit: Must keep the device in saturation
• For a fixed current, the load resistor can only be chosen so large
• To have good swing we'd also like to avoid getting to close to saturation
Current source supply:
By using a current source here, Current is independent of voltage for ideal source.
DC BIAS:
sets drain current
3.4 Small signal analysis of MOSFET and JFET Source follower and Common Gate amplifiers
At low frequencies and using a simplified hybrid-pi model the following small-signal characteristics can be derived.
(a) Basic N-channel MOSFET common-source amplifier with active load ID.
(b) Small-signal circuit for N-channel MOSFET common-source amplifier.
(c) Small-signal circuit for N-channel MOSFET common-source amplifier using Miller's theorem to introduce Miller capacitance CM.
The bandwidth of the common-source amplifier tends to be low due to high capacitance resulting from the Miller effect.
The gate-drain capacitance is effectively multiplied by the factor thus increasing the total input capacitance and lowering the overall bandwidth.
Figure (a) shows a MOSFET common-source amplifier with an active load.
Figure (b) shows the corresponding small-signal circuit when a load resistor RL is added at the output node and a Thévenin driver of applied voltage VA and series resistance RA is added at the input node.
The limitation on bandwidth in this circuit starts from the coupling of parasitic transistor capacitance Cgd between gate and drain and the series resistance of the source RA. (There are other parasitic capacitances, but they are neglected here as they have only a secondary effect on bandwidth.)
Using Miller's theorem, the circuit of figure (b) is transformed to that of figure (c), which shows the Miller capacitance CM on the input side of the circuit.
The size of CM is decided by equating the current in the input circuit of figure (c) through the Miller capacitance, say iM which is:
,to the current drawn from the input by capacitor Cgd in figure (b), namely jωCgdvGD.
These two currents are the same making the two circuits have the same input behavior provided the Miller capacitance is given by:
.
Usually the frequency dependence of the gain vD/ vG is unimportant for frequencies even somewhat above the corner frequency of the amplifier, which means a low-frequency hybrid-pi model is accurate for determining vD/ vG.
This evaluation is Miller's approximation and provides the estimate (just set the capacitances to zero in Figure (c).
,
so the Miller capacitance is,
.
The gain is large for large RL, so even a small parasitic capacitance Cgd can become a large influence in the frequency response of the amplifier and many circuit tricks are used to counteract this effect.
One trick is to add a common-gate(current-follower) stage to make a cascode circuit.
The current-follower stage presents a load to the common-source stage that is very small, namely the input resistance of the current follower (RL ≈ 1 / gm ≈ Vov/ (2ID) ; see common gate). Small RL reduces CM.
Returning to Figure (c), the gate voltage is related to the input signal by voltage division as:
.
The bandwidth (also called the 3dB frequency) is the frequency where the signal drops to 1/√2 of its low-frequency value. (In decibels, dB(√ 2) = 3.01 dB).
A reduction to 1/ √ 2 occurs when ωCMRA= 1, making the input signal at this value of ω(call this value ω3dB, say) vG = VA/ (1+j). The magnitude of (1+j) = √ 2.
As a result the 3dB frequency f3dB= ω3dB/ (2π) is:
.
If the parasitic gate-to-source capacitance Cgs is included in the analysis, it simply is parallel with CM, so
.
Notice that f3dB becomes large if the source resistance RA is small, so the Miller amplification of the capacitance has little effect upon the bandwidth for small RA.
This observation suggests another circuit trick to increase bandwidth: add a common-drain(voltage-follower) stage between the driver and the common-source stage so the Thévenin resistance of the combined driver plus voltage follower is less than the RA of the original driver.
Common drain amplifier:
FET AC Equivalent Circuit:
FET ac equivalent circuit
JFET source follower (common drain) configuration:
In a CD amplifier configuration the input is on the gate, but the output is from the source.
AC equivalent circuit of CD amplifier
CD ac equivalent circuit
• Input impedance:
• Output impedance:
Setting will result in the gate terminal being connected directly to ground as shown in figure below.
Output impedence
Determining z0 of the above diagram
which has the same format as the total resistance of three parallel resistors. Therefore,
• Voltage gain:
Since denominator is larger by a factor of one, the gain can never be equal to or greater than one.