8.1 Introduction to the 80386 microprocessor
The 80386 is an advanced 32-bit microprocessor optimized for multitasking operating systems and designed for applications needing very high performance. The 32-bit registers and data paths support 32-bit addresses and data types. The processor can address up to four gigabytes of physical memory and 64 terabytes (246 bytes) of virtual memory. The on-chip memory-management facilities include address translation registers, advanced multitasking hardware, a protection mechanism and paged virtual memory. Special debugging registers provide data and code breakpoints even in ROM-based software.
The 80386 is a high performance 32-bit microprocessor designed to drive the most advanced computer-based applications of today and tomorrow. CAD/CAE workstations, publishing, high resolution graphics,and office and factory automation are representative of today's applications that are well-served by the 80386. Tomorrow's applications may be more constrained by the imagination of system designers than by the power and versatility of the 80386.
80386 offers the system designer many new and powerful capabilities, including unprecedented performance of 3 to 4 million instructions per second, a complete 32-bit architecture, a 4-gigabyte (232 bytes) physical address space and on-chip support for paged virtual memory. While embodying the latest in microprocessor technology, the 80386 retains object code compatibility with the wealth of software written for its predecessors, the 8086 and 80286.
80386's virtual machine capability enables the 80386 to switch between programs running under different operating systems, such as Unix* and MS-DOS*. This facility enables OEMs to incorporate standard 16-bit application software directly into new 32-bit designs. Combining the power and performance of a superminicomputer with the low cost and design versatility of a microprocessor, the 80386 can open new markets to microprocessor-based systems. Applications that have not been feasible with slower microprocessors or cost-effective with superminicomputers are now practical with the 80386.
32-bit Architecture
The 80386's 32-bit architecture provides the programming resources required to directly support "large" applications-those characterized by large integers, large data structures, large programs (or large numbers of programs) and so on. The 80386's physical address space is 232 bytes or 4 gigabytes; its logical address space is 246 bytes or 64 terabytes.
The 80386's eight 32-bit general registers can be used interchangeably both as instruction operands and addressing mode variables. Data types include 8-, 16- and 32-bit integers and ordinals, packed and unpacked decimals, pointers and strings of bits, bytes, words and doublewords. The 80386 has a complete set of instructions for manipulating these types, as well as for controlling execution. The 80386 addressing modes support efficient access to the elements of the standard data structures: arrays, records, arrays of records and records containing arrays.
Registers
Computers, including the 80386, provide registers that programmers can use for very fast local storage. Register-resident data can be accessed without running bus cycles, thereby improving instruction execution time and leaving more bus bandwidth for other processors, such as direct memory access controllers.
The 80386 provides programmers and compilers with eight general registers; another eight registers can be supplied by an optional 80287 or 80387 Numeric Coprocessor. Two other 80386 registers, which are oriented toward processor control and status, rather than data storage, are also important to programmers; these are the Flags register and the Instruction Pointer.
General registers
All of the general registers can be used as 16- or 32-bit registers and four of them can also be used as eight 8-bit registers.
General registers
In nearly all instructions, any general register can be specified as an operand. For example, any two registers can be multiplied together.
Flags and Instruction Pointer
Figure below shows the format of the 80386 Flags register. The flags can be considered in three classes: status, control and system. The processor sets the status flags after many instructions to reflect the outcome of the operation. For example, when two operands compare equal, the processor sets the Zero flag.
Flag register
Other instructions, notably the conditional Jump instructions, testa status flag and behave differently depending on the flag's value. Programmers can set control flags to modify the semantics of some instructions. For example, the Scan string instruction looks toward higher or lower addresses depending on the value of the Direction Flag. The system flags are provided for operating system use and can be ignored by application programmers.
The 80386 Instruction Pointer, called EIP, is 32 bits wide. The Instruction Pointer controls instruction fetching and the processor automatically increments it after executing an instruction. Interrupts, exceptions and control transfer instructions, such as jumps and calls, alter the Instruction Pointer.
Numeric Coprocessor Registers
The numeric coprocessor registers shown in the figure below improve the performance of numeric applications. Connecting an 80287 or 80387 Numeric Coprocessor to an 80386 effectively adds these registers to the 80386. While a numeric coprocessor recognizes integers, packed decimal and floating point formats of various lengths, internally it holds all values in an eight deep 80-bit-wide floating point register stack.
Numeric Coprocessor Registers
Numeric instructions may implicitly refer to the top element(s) of the stack or explicitly to other registers. The Status Register maintains the top of stack pointer, flags that identify exceptions (for example, overflow) and condition codes that reflect the result of the last instruction. The Control Register contains option and mask bits that the programmer can set to select the rounding algorithm, how infinity is to be modeled and whether exceptions are to be handled by the coprocessor or by software.
8.1.1 Special 80386 registers
Four special registers are defined to refer to the descriptor tables supported by 80386. The 80386 supports four types of descriptor table such as:
Interrupt descriptor table (IDT)
Global descriptor table (GDT)
Task state segment descriptor (TSS)
Local descriptor table (LDT)
GDTR and IDTR
These registers hold the 32-bit linear base address and 16-bit limit of the GDT and IDT, respectively. The GDT and IDT segments, since they are global to all tasks in the system, are defined by 32-bit linear addresses and 16-bit limit values.
System address and system segment registers
LDTR and TR
These registers hold the 16-bit selector for the LOT descriptor and the TSS descriptor, respectively. The LOT and TSS segments, since they are task specific segments, are defined by selector values stored in the system segment registers. Note that a segment descriptor register is associated with each system segment register.